ULTRA-LOW-JITTER, MMW-BAND FREQUENCY SYNTHESIZERS BASED ON A CASCADED ARCHITECTURE

Department of Electrical EngineeringThis thesis presents an ultra-low-jitter, mmW-band frequency synthesizers based on a cascaded architecture. First, the mmW-band frequency synthesizer based on a CP PLL is presented. At the first stage, the CP PLL operating at GHz-band frequencies generated low-jitter output signals due to a high-Q VCO. At the second stage, an ILFM operating at mmW-band frequencies has a wide injection bandwidth, so that the jitter performance of the mmW-band output signals is determined by the GHz-range PLL. The proposed ultra-low-jitter, mmW-band frequency synthesizer based on a CP PLL, fabricated in a 65-nm CMOS technology, generated output signals from GHz-band frequencies to mmW-band frequencies, achieving an RMS jitter of 206 fs and an IPN of ???31 dBc. The active silicon area and the total power consumption were 0.32 mm2 and 42 mW, respectively. However, due to a large in-band phase noise contribution of a PFD and a CP in the CP PLL, this first stage was difficult to achieve an ultra-low in-band phase noise. Second, to improve the in-band phase noise further, the mmW-band frequency synthesizer based on a digital SSPLL is presented. At the first stage, the digital SSPLL operating at GHz-band frequencies generated ultra-low-jitter output signals due to its sub-sampling operation and a high-Q GHz VCO. To minimize the quantization noise of the voltage quantizer in the digital SSPLL, this thesis presents an OSVC as a voltage quantizer while a small amount of power was consumed. The proposed ultra-low-jitter, mmW-band frequency synthesizer fabricated in a 65-nm CMOS technology, generated output signals from GHz-band frequencies to mmW-band frequencies, achieving an RMS jitter of 77 fs and an IPN of ???40 dBc. The active silicon area and the total power consumption were 0.32 mm2 and 42 mW, respectively.clos

Revisiting Degrees of Freedom of Full-Duplex Systems with Opportunistic Transmission: An Improved User Scaling Law

It was recently studied how to achieve the optimal degrees of freedom (DoF) in a multi-antenna full-duplex system with partial channel state information (CSI). In this paper, we revisit the DoF of a multiple-antenna full-duplex system using opportunistic transmission under the partial CSI, in which a full-duplex base station having M transmit antennas and M receive antennas supports a set of half-duplex mobile stations (MSs) having a single antenna each. Assuming no self-interference, we present a new hybrid opportunistic scheduling method that achieves the optimal sum DoF under an improved user scaling law. Unlike the state-of-the-art scheduling method, our method is designed in the sense that the scheduling role between downlink MSs and uplink MSs is well-balanced. It is shown that the optimal sum DoF of 2 M is asymptotically achievable provided that the number of MSs scales faster than SNR M , where SNR denotes the signal-to-noise ratio. This result reveals that, in our full-duplex system, better performance on the user scaling law can be obtained without extra CSI, compared to the prior work that showed the required user scaling condition (i.e., the minimum number of MSs for guaranteeing the optimal DoF) of SNR 2 M − 1 . Moreover, the average interference decaying rate is analyzed. Numerical evaluation is performed to not only validate our analysis but also show superiority of the proposed method over the state-of-the-art method

Linear Algebraic Beamforming Design for Multiuser MISO Interference Channels: A Reduction in Search Space Dimension

Near-optimal transmit beamformers are designed for multiuser multiple-input single-output interference channels with slowly time-varying block fading. The main contribution of this article is to provide a method for deriving closed-form solutions to effective beamforming in both low and high signal-to-noise ratio regimes. The proposed method basically leverages side information obtained from the channel correlation between adjacent coding blocks. More specifically, our methodology is based on a linear algebraic approach, which is more efficient than the optimal scheme based on the Gaussian input in the sense of reducing the average number of search space dimensions for designing the near-optimal transmit beamformers. The proposed method is shown to exhibit near-optimal performance via computer simulations in terms of the average sum-rate

Single-User SFLC-OFDM System Realization Based on Channel Reciprocity Recovery

This paper demonstrates the implementation of a space–frequency line coded-orthogonal frequency-division multiplexing (SFLC-OFDM) system. The SFLC-OFDM system utilizes downlink channel state information at the transmitter, which can be obtained from uplink channel estimation under channel reciprocity assumption between uplink-and-downlink channels. However, in practical implementations, channel reciprocity is violated due to the imperfect synchronization and radio frequency chain mismatch between transceivers. To recover the channel reciprocity, frequency-domain signal processing methods are proposed. Furthermore, a low computational complexity single-instruction multiple-data method is implemented to meet the time constraints in real-time operating systems. The experimental results demonstrate that channel reciprocity can be effectively recovered in the implemented SFLC-OFDM system, resulting in practical communication performance regarding the symbol error rate

A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers

An ultra-low-phase-noise injection-locked frequency multiplier (ILFM) for millimeter wave (mm-wave) fifth-generation transceivers is presented. Using an ultra-low-power frequency-tracking loop (FTL), the proposed ILFM is able to correct the frequency drifts of the quadrature voltage-controlled oscillator of the ILFM in a real-time fashion. Since the FTL is monitoring the averages of phase deviations rather than detecting or sampling the instantaneous values, it requires only 600 mu W to continue to calibrate the ILFM that generates an mm-wave signal with an output frequency from 27 to 30 GHz. The proposed ILFM was fabricated in a 65-nm CMOS process. The 10-MHz phase noise of the 29.25-GHz output signal was -129.7 dBc/Hz, and its variations across temperatures and supply voltages were less than 2 dB. The integrated phase noise from 1 kHz to 100 MHz and the rms jitter were -39.1 dBc and 86 fs, respectively